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74LVC3G06
Triple inverter with open-drain output
Rev. 03 -- 01 February 2005 Product data sheet
1. General description
The 74LVC3G06 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. Schmitt trigger action at all inputs makes the circuit tolerant for slower input rise and fall time. This device is fully specified for partial power-down applications using Ioff. The Ioff circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. The 74LVC3G06 provides three inverting buffers. The output of this device is an open drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.
2. Features
s s s s Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant input/output for interfacing with 5 V logic High noise immunity Complies with JEDEC standard: x JESD8-7 (1.65 V to 1.95 V) x JESD8-5 (2.3 V to 2.7 V) x JESD8-B/JESD36 (2.7 V to 3.6 V). ESD protection: x HBM EIA/JESD22-A114-B exceeds 2000 V x MM EIA/JESD22-A115-A exceeds 200 V. -24 mA output drive (VCC = 3.0 V) CMOS low power consumption Latch-up performance exceeds 250 mA Direct interface with TTL levels Inputs accept voltages up to 5 V Multiple package options Specified from -40 C to +85 C and -40 C to +125 C.
s
s s s s s s s
Philips Semiconductors
74LVC3G06
Triple inverter with open-drain output
3. Quick reference data
Table 1: Quick reference data GND = 0 V; Tamb = 25 C. Symbol tPLZ, tPZL Parameter propagation delay input nA to output nY Conditions VCC = 1.8 V; CL = 30 pF; RL = 1 k VCC = 2.5 V; CL = 30 pF; RL = 500 VCC = 2.7 V; CL = 50 pF; RL = 500 VCC = 3.3 V; CL = 50 pF; RL = 500 VCC = 5.0 V; CL = 50 pF; RL = 500 CI CPD
[1]
Min -
Typ 2.6 1.6 2.2 2.0 1.4 2.5 5.9
Max -
Unit ns ns ns ns ns pF pF
input capacitance power dissipation capacitance per gate VCC = 3.3 V
[1] [2]
-
CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD x VCC2 x fi x N + (CL x VCC2 x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = number of inputs switching; (CL x VCC2 x fo) = sum of the outputs. The condition is VI = GND to VCC.
[2]
4. Ordering information
Table 2: Ordering information Package Temperature range Name 74LVC3G06DP 74LVC3G06DC 74LVC3G06GT -40 C to +125 C -40 C to +125 C -40 C to +125 C TSSOP8 VSSOP8 XSON8 Description plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm plastic very thin shrink small outline package; 8 leads; body width 2.3 mm plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm Version SOT505-2 SOT765-1 SOT833-1 Type number
5. Marking
Table 3: Marking Marking code V06 V06 V06
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Type number 74LVC3G06DP 74LVC3G06DC 74LVC3G06GT
9397 750 14541
Product data sheet
Rev. 03 -- 01 February 2005
2 of 15
Philips Semiconductors
74LVC3G06
Triple inverter with open-drain output
6. Functional diagram
1 1 1A 1Y 7 3 3 2A 2Y 5
1
7
1
5
6
3A
3Y
2
6
1
2
mnb032
mnb031
Fig 1. Logic symbol.
Fig 2. IEC logic symbol.
Y
A GND mna586
Fig 3. Logic diagram (one driver).
7. Pinning information
7.1 Pinning
06
1A 1A 3Y 2Y GND 1 2 3 4
001aab841
1
8
VCC
8 7
VCC 1Y 3A 2Y
3Y
2
7
1Y
06
6 5
2A
3
6
3A
GND
4
5
2Y
001aab842
Transparent top view
Fig 4. Pin configuration TSSOP8 and VSSOP8.
Fig 5. Pin configuration XSON8.
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Product data sheet
Rev. 03 -- 01 February 2005
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Philips Semiconductors
74LVC3G06
Triple inverter with open-drain output
7.2 Pin description
Table 4: Symbol 1A 3Y 2A GND 2Y 3A 1Y VCC Pin description Pin 1 2 3 4 5 6 7 8 Description data input data output data input ground (0 V) data output data input data output supply voltage
8. Functional description
8.1 Function table
Table 5: Input nA L H
[1] H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state.
Function table [1] Output nY Z L
9. Limiting values
Table 6: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol VCC IIK VI IOK VO IO ICC, IGND Tstg Ptot
[1] [2]
Parameter supply voltage input diode current input voltage output diode current output voltage output sink current VCC or GND current storage temperature power dissipation
Conditions VI < 0 V
[1]
Min -0.5 -0.5 [1] [1] [2]
Max +6.5 -50 +6.5 -50 +6.5 +6.5 50 100 +150 300
Unit V mA V mA V V mA mA C mW
VO < 0 V active mode Power-down mode VO = 0 V to 6.5 V
-0.5 -0.5 -65
Tamb = -40 C to +125 C
-
The input and output voltage ratings may be exceeded if the input and output current ratings are observed. When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.
9397 750 14541
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Product data sheet
Rev. 03 -- 01 February 2005
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Philips Semiconductors
74LVC3G06
Triple inverter with open-drain output
10. Recommended operating conditions
Table 7: Symbol VCC VI VO Tamb tr, tf Recommended operating conditions Parameter supply voltage input voltage output voltage ambient temperature input rise and fall times VCC = 1.65 V to 2.7 V VCC = 2.7 V to 5.5 V active mode Power-down mode; VCC = 0 V Conditions Min 1.65 0 0 0 -40 0 0 Typ Max 5.5 5.5 VCC 5.5 +125 20 10 Unit V V V V C ns/V ns/V
11. Static characteristics
Table 8: Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol VIH Parameter C [1] VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V VCC = 4.5 V to 5.5 V VIL LOW-level input voltage VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V VCC = 4.5 V to 5.5 V VOL LOW-level output voltage VI = VIH or VIL IO = 100 A; VCC = 1.65 V to 5.5 V IO = 4 mA; VCC = 1.65 V IO = 8 mA; VCC = 2.3 V IO = 12 mA; VCC = 2.7 V IO = 24 mA; VCC = 3.0 V IO = 32 mA; VCC = 4.5 V ILI IOZ Ioff ICC ICC input leakage current VI = 5.5 V or GND; VCC = 1.65 V to 5.5 V 3-state output OFF-state current power-off leakage current quiescent supply current additional quiescent supply current per pin VI = VIH or VIL; VO = VCC or GND; VCC = 5.5 V VI or VO = 5.5 V; VCC = 0 V VI = VCC or GND; IO = 0 A; VCC = 5.5 V VI = VCC - 0.6 V; IO = 0 A; VCC = 2.3 V to 5.5 V
[2] [2]
Conditions
Min
Typ
Max 0.7 0.8 0.3 x VCC 0.1 0.45 0.3 0.4 0.55 0.55 5 10 10 10 500
Unit V V V V V V V V V V V V V A A A A A
Tamb = -40 C to +85
HIGH-level input voltage
0.65 x VCC 1.7 2.0 0.7 x VCC 0.1 0.1 0.1 0.1 5
0.35 x VCC V
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Product data sheet
Rev. 03 -- 01 February 2005
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Philips Semiconductors
74LVC3G06
Triple inverter with open-drain output
Table 8: Static characteristics ...continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol CI VIH Parameter input capacitance HIGH-level input voltage VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V VCC = 4.5 V to 5.5 V VIL LOW-level input voltage VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V VCC = 4.5 V to 5.5 V VOL LOW-level output voltage VI = VIH or VIL IO = 100 A; VCC = 1.65 V to 5.5 V IO = 4 mA; VCC = 1.65 V IO = 8 mA; VCC = 2.3 V IO = 12 mA; VCC = 2.7 V IO = 24 mA; VCC = 3.0 V IO = 32 mA; VCC = 4.5 V ILI IOZ Ioff ICC ICC input leakage current VI = 5.5 V or GND; VCC = 1.65 V to 5.5 V 3-state output OFF-state current power-off leakage current quiescent supply current additional quiescent supply current per pin VI = VIH or VIL; VO = VCC or GND; VCC = 5.5 V VI or VO = 5.5 V; VCC = 0 V VI = VCC or GND; IO = 0 A; VCC = 5.5 V VI = VCC - 0.6 V; IO = 0 A; VCC = 2.3 V to 5.5 V 0.1 0.70 0.45 0.60 0.80 0.80 20 10 20 40 5000 V V V V V V A A A A A Conditions Min Typ 2.5 Max 0.7 0.8 0.3 x VCC Unit pF V V V V V V V
Tamb = -40 C to +125 C 0.65 x VCC 1.7 2.0 0.7 x VCC -
0.35 x VCC V
[1] [2]
All typical values are measured at Tamb = 25 C. These typical values are measured at VCC = 3.3 V.
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Product data sheet
Rev. 03 -- 01 February 2005
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Philips Semiconductors
74LVC3G06
Triple inverter with open-drain output
12. Dynamic characteristics
Table 9: Dynamic characteristics GND = 0 V; see Figure 7 for test circuit. Symbol tPLZ, tPZL Parameter C [1] 1.0 0.5 1.0 0.5 0.5
[2] [3]
Conditions
Min
Typ
Max
Unit
Tamb = -40 C to +85
propagation delay see Figure 6 input nA to output nY VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 2.7 V VCC = 3.0 V to 3.6 V VCC = 4.5 V to 5.5 V
2.6 1.6 2.2 2.0 1.4 5.9
6.5 3.9 4.2 3.4 2.9 -
ns ns ns ns ns pF
CPD
power dissipation VCC = 3.3 V capacitance per gate propagation delay see Figure 6 input nA to output nY VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 2.7 V VCC = 3.0 V to 3.6 V VCC = 4.5 V to 5.5 V
-
Tamb = -40 C to +125 C tPLZ, tPZL 1.0 0.5 1.0 0.5 0.5 8.2 4.9 5.3 4.3 3.7 ns ns ns ns ns
[1] [2]
All typical values are measured at Tamb = 25 C and nominal VCC. CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD x VCC2 x fi x N + (CL x VCC2 x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = number of inputs switching; (CL x VCC2 x fo) = sum of the outputs. The condition is VI = GND to VCC.
[3]
9397 750 14541
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 -- 01 February 2005
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Philips Semiconductors
74LVC3G06
Triple inverter with open-drain output
13. Waveforms
VI nA input GND t PZL VCC nY output VOL Vx t THL VM t PZL VM
mnb033
Measurement points are given in Table 10. VOL and VOH are typical output voltage drop that occur with the output load.
Fig 6. The input (nA) to output (nY) propagation delays. Table 10: VCC 1.65 V to 1.95 V 2.3 V to 2.7 V 2.7 V 3.0 V to 3.6 V 4.5 V to 5.5 V Measurement points Input VM 0.5 x VCC 0.5 x VCC 1.5 V 1.5 V 0.5 x VCC VI VCC VCC 2.7 V 2.7 V VCC tr = tf 2.0 ns 2.0 ns 2.5 ns 2.5 ns 2.5 ns Output VM 0.5 x VCC 0.5 x VCC 1.5 V 1.5 V 0.5 x VCC VX VOL + 0.15 V VOL + 0.15 V VOL + 0.3 V VOL + 0.3 V VOL + 0.3 V
Supply voltage
VEXT VCC PULSE GENERATOR VI D.U.T. RT CL RL VO RL
mna616
Test data is given in Table 11. Definitions for test circuit: RL = Load resistor. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
Fig 7. Load circuitry for switching times.
9397 750 14541
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 -- 01 February 2005
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Philips Semiconductors
74LVC3G06
Triple inverter with open-drain output
Test data Input VI VCC VCC 2.7 V 2.7 V VCC Load CL 30 pF 30 pF 50 pF 50 pF 50 pF RL 1 k 500 500 500 500 VEXT tPZL, tPLZ 2 x VCC 2 x VCC 6V 6V 2 x VCC
Table 11: VCC
Supply voltage 1.65 V to 1.95 V 2.3 V to 2.7 V 2.7 V 3.0 V to 3.6 V 4.5 V to 5.5 V
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Product data sheet
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Philips Semiconductors
74LVC3G06
Triple inverter with open-drain output
14. Package outline
TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm SOT505-2
D
E
A
X
c y HE vMA
Z
8
5
A pin 1 index
A2 A1
(A3)
Lp L
1
e bp
4
wM
detail X
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.1 A1 0.15 0.00 A2 0.95 0.75 A3 0.25 bp 0.38 0.22 c 0.18 0.08 D(1) 3.1 2.9 E(1) 3.1 2.9 e 0.65 HE 4.1 3.9 L 0.5 Lp 0.47 0.33 v 0.2 w 0.13 y 0.1 Z(1) 0.70 0.35 8 0
Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT505-2 REFERENCES IEC JEDEC --JEITA EUROPEAN PROJECTION ISSUE DATE 02-01-16
Fig 8. Package outline SOT505-2 (TSSOP8).
9397 750 14541 (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 -- 01 February 2005
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Philips Semiconductors
74LVC3G06
Triple inverter with open-drain output
VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm
SOT765-1
D
E
A X
c y HE vMA
Z
8
5
Q A pin 1 index A2 A1 (A3) Lp L
1
e bp
4
wM
detail X
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1 A1 0.15 0.00 A2 0.85 0.60 A3 0.12 bp 0.27 0.17 c 0.23 0.08 D(1) 2.1 1.9 E(2) 2.4 2.2 e 0.5 HE 3.2 3.0 L 0.4 Lp 0.40 0.15 Q 0.21 0.19 v 0.2 w 0.13 y 0.1 Z(1) 0.4 0.1 8 0
Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT765-1 REFERENCES IEC JEDEC MO-187 JEITA EUROPEAN PROJECTION
ISSUE DATE 02-06-07
Fig 9. Package outline SOT765-1 (VSSOP8).
9397 750 14541 (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 -- 01 February 2005
11 of 15
Philips Semiconductors
74LVC3G06
Triple inverter with open-drain output
XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm
SOT833-1
1
2
3
b 4 4x L
(2)
L1
e
8 e1
7 e1
6 e1
5
8x
(2)
A
A1 D
E
terminal 1 index area 0 DIMENSIONS (mm are the original dimensions) UNIT mm A (1) max 0.5 A1 max 0.04 b 0.25 0.17 D 2.0 1.9 E 1.05 0.95 e 0.6 e1 0.5 L 0.35 0.27 L1 0.40 0.32 1 scale 2 mm
Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. OUTLINE VERSION SOT833-1 REFERENCES IEC --JEDEC MO-252 JEITA --EUROPEAN PROJECTION ISSUE DATE 04-07-22 04-11-09
Fig 10. Package outline SOT833-1 (XSON8).
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Product data sheet
Rev. 03 -- 01 February 2005
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Philips Semiconductors
74LVC3G06
Triple inverter with open-drain output
15. Revision history
Table 12: Revision history Release date 20050201 Data sheet status Product data sheet Product data sheet Product data sheet Change notice Doc. number 9397 750 14541 9397 750 13789 9397 750 13266 Supersedes 74LVC3G06_2 74LVC3G06_1 Document ID 74LVC3G06_3 Modifications: 74LVC3G06_2 74LVC3G06_1
*
Changed: type number 74LVC3G06GT (SOT833-1).
20041021 20040607
9397 750 14541
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 -- 01 February 2005
13 of 15
Philips Semiconductors
74LVC3G06
Triple inverter with open-drain output
16. Data sheet status
Level I II Data sheet status [1] Objective data Preliminary data Product status [2] [3] Development Qualification Definition This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).
III
Product data
Production
[1] [2] [3]
Please consult the most recently issued data sheet before initiating or completing a design. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
17. Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
18. Disclaimers
Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
19. Contact information
For additional information, please visit: http://www.semiconductors.philips.com For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com
9397 750 14541
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 -- 01 February 2005
14 of 15
Philips Semiconductors
74LVC3G06
Triple inverter with open-drain output
20. Contents
1 2 3 4 5 6 7 7.1 7.2 8 8.1 9 10 11 12 13 14 15 16 17 18 19 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 4 Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 5 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 13 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 14 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Contact information . . . . . . . . . . . . . . . . . . . . 14
(c) Koninklijke Philips Electronics N.V. 2005
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 01 February 2005 Document number: 9397 750 14541
Published in The Netherlands

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